This is a personal knowledge base for notes, experiments, and breaking problems into manageable parts.
The goal is not to turn every thought into a polished tutorial. I want to keep the useful trail: what failed, what was verified, what changed, and what is worth remembering.
The site is maintained from Obsidian. The publishing flow stays intentionally small: write locally, mark what is public, build static pages, and deploy them to the cloud.
Notes will change as my understanding changes. If one of them helps you avoid a little friction, the site has done its job.
Current research direction
AI computing systems and heterogeneous computing R&D. GPU inference optimization is the first priority, FPGA digital computing the second core, and Linux / RISC-V / SoC the third supporting track. MCU / PCB work remains an engineering foundation.
Five-stage roadmap, time allocation and acceptance criteria: foundations in months 0–4; CUDA/Triton and FPGA pipelining and timing in months 5–10; inference systems and Linux/RISC-V/SoC in months 11–16; a GPU or FPGA/SoC specialization in months 17–24; employment or research from year 3 onward. These are planning windows, with progress established by prerequisites and project evidence.
The initial technical-study allocation is 40% GPU, 30% FPGA, 20% Linux/RISC-V/SoC and 10% MCU/PCB, adjustable in the second year. Computer science, mathematics and engineering practices run throughout. Hardware serves project goals rather than creating a separate major project for every device. AI may assist implementation extensively; understanding core principles, debugging and validation must remain independent.
I no longer plan to participate in the Lanqiao Cup. Existing G431 GPIO/LCD notes remain MCU engineering foundations; historical records and independent English goals are retained.